Comparative Analysis of the Drain Current in a 7nm and 14nm Fully Depleted Silicon-On-Insulator (SOI) MOSFET

Sulaiman Muhammad Gana, Garba Shehu Musa Galadanci, Tijjani Hassan Darma, Abdurrazak Tijjani

Keywords: Drain current, SOI-MOSFET, Gate Voltage, Channel Length, Temperature


This research investigates the influence of temperature on the drain current of a 7nm and 14nm Silicon-on-Insulator (SOI) MOSFET with Silicon (Si) and Gallium Arsenide (GaAs) as channel materials. The Semi-classical transport model is used to study the effect at 50K, 250K, 350K, 450K, 650K, and 850K. The 7nm and 14nm SOI MOSFET Si channels have low resistance when the temperature rises from 50K to 850K. Because the contraction in the channel size results in quicker injection of the electron with a high average electron velocity and high electron density, the drain current is virtually linear as the gate voltage increases. It was discovered that the drain current in the 7nm and 14nm GaAs SOI MOSFET channels is increased by an increase in mobility as the channel length reduces to the nanoscale dimension, with a decrease in resistance as the temperature rises. In the 7nm GaAs channel, the average electron velocity decreases as channel length increases at 50K, 250K, 350K, and 450K, then increases at higher temperatures of 650K and 850K, whereas in the 14nm GaAs channel, the average electron velocity increases as channel length increases at 350K, 450K, 650K, and 850K, then decreases at 50K and 250K. The results reveal that GaAs has greater electron mobility and a higher on-state current in both the 7nm and 14nm channels.